DMA Controller

DMA Controller

Quick Facts

EFM32 DMA

What?

The DMA controller is available in Energy Mode 0 to Energy Mode 2 and can move data without CPU intervention, effectively reducing the energy consumption for a data transfer.

Why?

The DMA can perform data transfers more energy efficiently than the ARM Cortex-M3 CPU and allows autonomous operation in low energy modes. The Low Energy UART (LEUART) can for instance provide full UART communication in EM2, consuming only a few μA by using the DMA to move data between the LEUART and RAM.

How?

The DMA controller has multiple highly configurable, prioritized DMA channels. Advanced transfer modes such as ping-pong and scatter-gatter make it possible to tailor the controller to the specific needs of an application.

Features

The Direct Memory Access (DMA) controller performs memory operations independently of the CPU. This has the benefit of reducing the energy consumption and the workload of the CPU, and enables the system to stay in low energy modes when moving for instance data from the USART to RAM or from the External Bus Interface to the DAC.

  • The DMA controller is accessible as a memory mapped peripheral
  • Transfers between RAM, EBI, Flash, and peripherals
  • The DMA controller has 8 independent channels
  • Each channel has one (primary) or two (primary and alternate) descriptors
  • Transfer mode, priority, word count- and size options
  • Programmable channel transfer length
  • Various triggers can start DMA

Data transfer to/from the LEUART in Energy Mode 2 is supported by the DMA and the Energy Management Unit and provides extremely low energy consumption while performing UART communications